Projects

Real-Time Object Detection

[Python/Tensorflow] Using the You-Only-Look-Once (YOLO) object detection algorithm to mark the locations of geese in images. I’m an amateur photographer and I love Canada geese, so I made a Goose Dataset with my own photos and experimented on it. Independent project started in July 2018.

The GANder Project

[Python/Keras] Using Generative Adversarial Networks (GANs), including GAN, WGAN, and VAE-GAN, to generate goose faces based on the Goose Dataset. The geese are not necessarily ganders (male geese) but the name fits. Independent project started in July 2018.

Loan Default Prediction

[Python/Keras] Applying logistic regression, random forests, gradient-boosted decision trees (XGBoost), SVM, nearest neighbors, and neural networks to predict the loan default probability. Also experimented with feature engineering techniques such as feature hashing, feature discretization with XGBoost and random forests, principal component analysis (PCA), etc. Independent project started in May 2018.

F-RankClass ICDM’13

[C++/MATLAB] Graph mining for joint text-image document classification and ranking on Wikipedia entries. This is a class project for CS512 Data Mining Principles at UIUC in Spring 2013 and has been published at International Conference on Data Mining in December 2013.

Algorithmic Stock Trading

[C++/MATLAB/Tensorflow] Using SVM and neural networks to predict buy/sell events. This is an on-and-off side project from 2011 to 2016.

Social Network Graph Partitioning

[C++] Taking advantage of social network properties, performing hierarchical graph partitioning to make each subgraph feasible in size. This is a class project for ECE598YL Cloud Computing at UIUC in Fall 2010.

Modeling and Simulation of Emerging Devices

[C++/MATLAB] Developed low-computational-complexity models of 3 families of emerging non-silicon-based transistors. Performed Monte Carlo simulation based on the model above to explore advantages over traditional transistors. This is my Ph.D. dissertation at UIUC. For this work, I also have multiple journal and conference publications, and I released 2 open-source transistor models on nanohub.org, an open-source platform for nanotechnology research (see my Publications page). (1200+ users since 2014.)

Clock Tree Routing Algorithm Based on Delay And Slew Modeling

[C++] Developed polynomial regression models of clock buffer delay and slew to predict circuit behavior. Proposed and implemented an algorithm using the models above to control clock accuracy under extreme conditions. This is my M.S. thesis at UIUC and was published at Design Automation Conference in June 2010.

Numerical Circuit Simulator

[C++] Implemented a SPICE-like numerical circuit simulator based on matrix representation of circuits, including DC, AC, and transient analysis. This is a class project for ECE552 Numerical Circuit Analysis at UIUC in Fall 2009.

EDA Backend Design Flow

[C++] Implemented the EDA backend design flow including partitioning, placement, routing, and timing analysis. This is a class project for ECE582 Physical VLSI Design at UIUC in Spring 2009.

EDA High-Level Synthesis Optimization

[C++] Developed and implemented a high-level circuit synthesis framework on optimization of concurrent resource binding, task scheduling, and logic cell placement by integer-linear-programming formulation. This is a class project for ECE527 System-on-Chip Design at UIUC in Fall 2008.

Comparative Study of Multi-Gate Transistor Designs

[MATLAB] Survey, comparison, and simulation of multi-gate transistors including FinFET. This is a class project for ECE585 MOS Device Modeling and Design at UIUC in Fall 2012.