Education & Experiences

Work Experience

  • Sr. Software Engineer, Twitter, San Francisco, CA (January 2019 - present)
    • Onboarding 🚀
      • Using machine learning to improve new user experience and grow the Twitter user base.
  • R&D Engineer (Software), Sr. II, Synopsys Inc., Mountain View, CA (November 2015 - February 2018)
    • Worked a mixed-language (SystemVerilog/VHDL) compiler for the ZeBu FPGA emulation system, including:
      • Optimization and transformation on computation graphs and circuit data structures, achieving 27% running time improvement, 11% peak memory usage reduction, 35% emulation resource reduction. (C++)
      • Automatic test data generation for time-series simulation and correctness validation, creating a seamless testing and debugging workflow, greatly reducing the iteration time for R&D and application engineers. (C++/Tcl)
  • Research Intern (Software), Strategic Computer-Aided Design Labs, Intel Corporation, Hillsboro, OR (August 2011 - December 2011)
    • Investigated process variation under near-threshold voltage circuit operations.
    • Performed numerical simulation and mathematical analysis of the most probable point theory. (C++/MATLAB)
    • Performed experiments on discrete gate-sizing optimization. (Perl/Tcl)

Education

  • M.S./Ph.D., Electrical and Computer Engineering, University of Illinois at Urbana-Champaign, Urbana, IL, USA (2008 - 2015)
  • B.S., Electrical Engineering, Taipei, Taiwan (2004 - 2008)

Training Programs

  • AI Bootcamp for Machine Learning Engineers, deeplearning.ai, (July 2018) (Certificate)

MOOC

  • CSMM.102x: Machine Learning, edX/Columbia University (Completed May 2018) (Certificate)
  • Deep Learning Specialization, Coursera/deeplearning.ai (Completed March 2018) (All Certificates)
    • Neural Networks and Deep Learning
    • Improving Deep Neural Networks: Hyperparameter Tuning, Regularization and Optimization
    • Structuring Machine Learning Projects
    • Convolutional Neural Networks
    • Sequence Models

Academic Experience

  • Research Assistant, with Prof. Deming Chen, University of Illinois at Urbana-Champaign (2008 - 2015)
  • Teaching Assistant, University of Illinois at Urbana-Champaign
    • ECE 527 System-on-Chip Design
    • ECE 412 Microcomputer Laboratory
    • ECE 385 Digital Systems Laboratory
    • ECE 298 Digital System Design Laboratory
      • Developed two labs on system-on-a-chip and embedded systems, including a USB (Universal Serial Bus) driver and an AES (Advanced Encryption Standard) decryption system. (C/SystemVerilog)
  • Guest Lecturer, University of Illinois at Urbana-Champaign
    • ECE 527, ECE 385, ECE 298
  • Reviewer
    • IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
    • IEEE Transactions on Circuits and Systems
    • IEEE Transactions on Very Large Scale Integration Systems
    • ACM/SIGDA International Symposium on Field-Programmable Gate Array